The inventive concept relates to a method of forming patterns for a semiconductor device, and more particularly, to a method of forming patterns for a semiconductor device in which a plurality of patterns having various widths are simultaneously formed while using a double patterning process.
In manufacturing high-scaled highly-integrated semiconductor devices, to form both fine patterns having fine widths, which are repeatedly formed at fine pitches, and patterns having relatively large widths at adjacent locations simultaneously, a technique for securing a sufficient alignment margin between the fine patterns and the large-width patterns so as to allow desired patterns to be formed according to a design without producing faulty patterns is required.